||A study of Strontium-Doped Tin Dioxide-Based Thin Film Transistors
||Institute of Microelectronics
Ultrasonic Spray Pyrolysis Deposition
negative bias illumination stress test
本論文以超音波噴塗熱裂解法製備上閘極二氧化錫摻雜鍶薄膜電晶體。論文中探討了包含使用超音波噴塗熱裂解沉積法在較高溫中噴塗二氧化錫薄膜減少氧空缺形成之優勢、摻雜鍶之後薄膜氧空缺含量減少和晶粒大小減少的原因和對元件造成之影響，以及上閘極結構設計之原因還有未來應用發展之潛力。本篇論文中，首先以下閘極結構製程較快速的優點快速得到實驗參數，再來也探討了在主動層上沉積鈍化層後對元件在空氣中穩定性改善的影響，最後藉由新的光罩製造出上閘極結構的薄膜電晶體元件，其元件轉換特性可以達到開關電流比 3.42×108、次臨界擺幅 120.08mV/dec、臨界電壓 -0.30V、場效電子遷移率 43.12cm2/Vs和負閘極偏壓照光下臨界電壓偏移-0.25V等優秀表現。
In this study, the strontium doped tin dioxide (SnO2:Sr) thin film transistors were fabricated by ultrasonic spray pyrolysis deposition (USPD) successfully. According to the investigation, we found the advantages of this work, including USPD method in depositing SnO2 thin film in order to reduce the formation of oxygen vacancies, the strontium doping in the SnO2 caused the decrease of oxygen vacancies and the grain size of the thin film, and the advantages of the TFTs with top-gate structure. In this study, bottom-gate devices were fabricated to optimize the deposition rate of the active layer and dielectric layer by USPD. In addition, the bottom-gate devices with passivation layer were fabricated to observe the improvement of the devices stability in air. Moreover, the top-gate devices were fabricated to improve the electrical characteristics with Ion/Ioff of 3.42×108, subthreshold swing (S.S) of 120.08 mV/dec, threshold voltage (Vth) of -0.30V, field effect mobility (μFE) of 43.12 cm2/V-s, and Vth shift of -0.25V under negative bias illumination stress (NBIS).
USPD can deposit SnO2 thin film at higher temperature (> 400℃). It makes the concentration of oxygen vacancies decrease significantly in the thin film. In addition, the strontium doping into the SnO2 thin film can slightly suppress the formation of the oxygen vacancies as well because it has tighter bonding with oxygen. It reduces the excess charge carriers of the SnO2 thin films, and makes the channel be depleted easily in off-state. Besides, the grain size of the SnO2 thin film decreased after the doping of strontium. It reduces the scattering causing by the grain boundary and improves the interface quality between the channel and dielectric layer. Furthermore, the annealing process is available to the top-gate structure without concerning the diffusion between each layer of the device. It can improve the thin film quality or obtain different crystal phase. After the optimization above, the electrical characteristics including threshold voltage, field effect mobility and subthreshold swing were improved significantly, the Vth shift of the hysteresis and NBIS is relatively low as well.
In this study, we successfully fabricated SnO2:Sr TFTs with top-gate structure by USPD method. The thin films deposited by this method are highly competitive in the market due to its low fabrication cost and non-vacuum environment. The performance of the device was improved after doping strontium into the SnO2 thin film. In Addition, the SnO2:Sr TFTs is a promising material with high electron mobility, high Ion/Ioff and high stability, which has great potential for the next generation of large-area panel industry applications. It is expected to be applied to the display market in future.
Table Captions xi
Figure Captions xii
Chapter 1 Introduction 1
1-1 Background and Motivation of Research 1
1-2 Ultrasonic Spray Pyrolysis Deposition 6
1-3 Material Property of Tin Dioxide 7
1-4 Organization 10
Chapter 2 Material Growth and Devices Fabrication 11
2-1 Device Structure and Fabrication 11
2-1-1 Pre-Cleaning 11
2-1-2 Deposition of the Al2O3 Buffer Layer 12
2-1-3 Deposition of the SnO2:Sr Active Layer 12
2-1-4 Fabrication of Source and Drain Electrode 13
2-1-5 Deposition of the Al2O3 Dielectric Layer 14
2-1-6 Fabrication of Gate Electrode 14
Chapter 3 Results and Discussion 19
3-1 Material Analysis 19
3-1-1 Scanning Electron Microscopy 19
3-1-2 Atomic Force Microscopy 22
3-1-3 Grazing Incident X-ray Diffraction 25
3-1-4 X-ray Photoelectron Spectroscopy 28
3-1-5 Photoluminescence 34
3-1-6 Ellipsometry 37
3-1-7 Hall Measurement 40
3-1-8 Transmission Electron Microscopy 42
3-1-9 Energy-dispersive X-ray spectroscopy 44
3-2 Optimization 46
3-2-1 Strontium Doping 48
3-2-2 Deposition Rate of USPD 52
3-2-3 Different Thicknesses of Active Layer 55
3-2-4 Different Thickness of Dielectric Layer 57
3-2-5 Different Source and Drain Electrodes 59
3-3 DC Electric Characteristics 63
3-3-1 SnO2:Sr TFT (bottom-gate devices) 63
3-3-2 SnO2:Sr TFT (with passivation) 68
3-3-3 SnO2:Sr TFT (top-gate devices) 70
3-4 Stability-Negative Bias Illumination Stress 75
Chapter 4 Conclusion and Future works 79
4-1 Conclusion 79
4-2 Suggestion for Future Works 83
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