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系統識別號 U0026-2807201411241000
論文名稱(中文) 應用於系統晶片之穩定參考電壓源產生電路與溫度感測系統之設計
論文名稱(英文) Design of Stable Reference Voltage Generator and Temperature Sensing System for System Chip Applications
校院名稱 成功大學
系所名稱(中) 電機工程學系
系所名稱(英) Department of Electrical Engineering
學年度 102
學期 2
出版年 103
研究生(中文) 陳鵬宇
研究生(英文) Peng-Yu Chen
學號 N28961345
學位類別 博士
語文別 英文
論文頁數 97頁
口試委員 召集委員-王朝欽
口試委員-陳竹一
口試委員-許孟烈
口試委員-楊清淵
口試委員-洪浩喬
口試委員-劉濱達
口試委員-蔡建泓
指導教授-張順志
中文關鍵字 帶差參考電壓  關聯式雙重取樣  溫度感測器  校正 
英文關鍵字 bandgap reference  CDS  temperature sensor  calibration 
學科別分類
中文摘要 類比與混合訊號電路對於製程漂移或是電源電壓變異等環境因子相當敏感。在一個高度整合的系統晶片中,熱能所造成的影響是越來越受到關注的議題。無論是在各種溫度條件下維持晶片的功能,或是即時的過熱警示,在一個系統晶片中都是必需的。在本論文中,我們提出切換電容式的帶差參考電壓產生器,並進一步以改良式關聯式雙重取樣技術以增進其效能。此電路可在一個寬廣溫度範圍內產生一個對溫度不敏感的參考電壓,並且可自由調整輸出電位值。利用關聯式雙重取樣技術,本電路可使用一個低增益放大器完成,因而使本電路適用於低端電壓環境之中。
為了對在系統晶片中的每個重要位置作即時溫度監控,本文也提出了一個主從式溫度感測機制。利用主要溫度感測器擁有的高準確度以及高線性度,以及數位輔助溫度感測器在製造成本上的優勢,本感測系統可以在佔用極小面積以及消耗少許功耗的前提下監控在系統晶片中的多個熱點。本論文亦同時提出一個基於兩種溫度感測器在校正複雜度以及對金氧半場效應電晶體的退化敏感度的差異之校正對策,以校正所有在溫度監控系統中被使用的溫度感測器。
英文摘要 Analog and mixed-signal circuits are sensitive to many factors such as the manufacturing process and supply voltage variations. In a highly integrated system chip, the effect from heat is an important issue which is attracting more and more concern. Either the function maintenance in different temperature or the real-time warning of overheat is necessary in a system chip. In this dissertation, we present a switched-capacitor (SC) charge-mode bandgap reference generator with an improved correlated double sampling (CDS) technique to produce a temperature-insensitive output reference voltage over a wide temperature range. By manipulating the CDS technique, the circuit only needs a low-gain amplifier to realize the design, and thus it is suitable for low-supply-voltage applications.
For real-time thermal monitoring of all the critical locations in a system-on-a-chip (SoC), a primary-auxiliary temperature sensing scheme is proposed. Taking advantage of the high accuracy and linearity of the analog primary temperature sensors and the low production cost of the digital auxiliary temperature sensors, this sensing scheme monitors multiple hotspots in a highly integrated system chip with small area and low power consumption. A cost efficient calibration strategy based on the difference of calibration complexity and sensitivity to the MOSFET aging between the primary and auxiliary temperature sensors is also presented in this dissertation. This calibration strategy can calibrate all the temperature sensors in a thermal monitoring system.
論文目次 Table of Contents V
List of tables VII
List of Figures VIII
Chapter 1 Introduction 1
1.1 Motivation 1
1.2 Temperature Sensing Element 5
1.2.1 Diode 5
1.2.2 Diode-Connected BJT 8
1.2.3 MOSFET 12
1.3 Organization of the Dissertation 15
Chapter 2 Literature Review 16
2.1 Bandgap Reference Generator 16
2.1.1 Voltage-Mode Bandgap Reference Generator 17
2.1.2 Current-Mode Bandgap Reference Generator 19
2.1.3 Switched-Capacitor Bandgap Reference Generator 22
2.2 Smart Temperature Sensor 24
2.2.1 Voltage-Domain Temperature Sensor 24
2.2.2 Time-Domain Temperature Sensor 29
2.2.3 Temperature Sensing for Multiple Hotspots 32
Chapter 3 Charge-Mode CDS Bandgap Reference Generator 35
3.1 Original Charge-mode CDS Bandgap Reference Generator 36
3.1.1 Proposed Bandgap Reference Structure 36
3.1.2 Supply-Insensitive Signal Source 42
3.1.3 Design Consideration of Key Building Blocks 47
3.2 Charge-mode CDS Bandgap Reference Generator with Improved Switching Scheme 50
3.2.1 Improved Switching Scheme 50
3.2.2 Advantages of the Improved CDS Switching Scheme 53
3.2.3 Design Consideration of Key Building Blocks 55
3.3 Experiment Results 58
Chapter 4 Primary-Auxiliary Temperature Sensing Scheme for System Chips 67
4.1 Main Temperature Sensing Scheme 67
4.2 Temperature Sensor Structure 69
4.2.1 Primary Temperature Sensor 69
4.2.2 Auxiliary Temperature Sensor 74
4.3 Calibration Method 76
4.3.1 Initial Calibration 77
4.3.2 Subsequent calibration for A_TSs 79
4.4 Experiment Results 81
Chapter 5 Concluding Remarks and Future Work 87
5.1 Concluding Remarks 87
5.2 Future Work 89
References 90

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