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系統識別號 U0026-2202201814225100
論文名稱(中文) 電容性源極衰減與自發性轉導匹配之四相位壓控振盪器
論文名稱(英文) A Capacitive Source Degeneration Coupling and Spontaneous Transconductance Matching Quadrature VCO
校院名稱 成功大學
系所名稱(中) 電機工程學系
系所名稱(英) Department of Electrical Engineering
學年度 106
學期 1
出版年 107
研究生(中文) 邱俊榕
研究生(英文) Chun-Jung Chiu
學號 n26031615
學位類別 碩士
語文別 中文
論文頁數 59頁
口試委員 指導教授-李順裕
口試委員-鄭光偉
召集委員-王鴻猷
中文關鍵字 電容性源極衰退耦合  自發性轉導匹配  四相位壓控振盪器  消除雙模振盪 
英文關鍵字 Capacitive Source Degeneration Coupling  Spontaneous Transconductance Matching  Quadrature VCO  Bi-Modal Oscillation 
學科別分類
中文摘要 本論文為研究振盪電路並追求高準確度的訊號設計。提出一個融合兩獨特架構的電路設計,推導相關公式並用以優化設計使其具備高度的信號準確率。採用互補式電晶體架構,並利用相關理論輔助設計,使其優化後的電路能夠產生更高準確性的四相位訊號。佈局時利用國家晶片系統設計中心的規則佈置接點(Pad)的位置,並委託該單位進行探針量測。量測結果為在離中心頻率1 MHz處之相位雜訊為-121 dBc/Hz,功耗在1.8伏供應電壓時為3.81毫瓦,此時正交相位誤差小於0.1度而正交振幅誤差0.006 dB。考慮四個相位訊號時,相位誤差為0.58度,而振幅誤差為0.448dB。第二版本的晶片採用TSMC 0.18μm 1P6M CMOS製程實現,並委託國家晶片系統設計中心量測。
英文摘要 This paper proposes a quadrature voltage-controlled oscillator (QVCO) using capacitive source degeneration coupling (CSDC) and spontaneous transconductance matching (STM) techniques. Because the mismatch in QVCO structure will result in serious phase error and gain error, a CSDC structure is used to overcome phase error and a STM structure is adopted to reduce the gain error, respectively. Moreover, in order to design a remarkable phase error of less than 0.1°, a systematic analysis of QVCO on the proposed techniques is presented. The measurement results reveal the proposed QVCO has the phase error less than 0.07o at 2.45 GHz. The measured phase noise is -121 dBc/Hz at 1-MHz offset while consumes 3.81 mW under a 1.8-V supply voltage to achieve the figure of merit of -182.98. The tuning range is between 2.303 and 2.475 GHz to fit the requirement of IEEE 802.15.4.
論文目次 摘要 I
誌謝 VIII
章節目錄 IX
表目錄 XI
圖目錄 XII
第一章 緒論 1
1.1 研究動機 1
1.2 研究方法 2
1.3 論文架構 3
第二章 壓控振盪器 4
2.1 簡介 4
2.2 環形振盪器基本原理 5
2.2.1 反向放大環形振盪器 5
2.2.2 全差分反向放大環形振盪器 6
2.3 LC-Tank振盪器基本原理 7
2.3.1 LC-Tank分析 7
2.3.2 負電阻 9
2.3.3 LC-Tank 振盪器 11
2.3.4 相位雜訊 13
第三章 四相位壓控振盪器 17
3.1 簡介 17
3.2 四相位振盪器選型 21
3.3 四相位壓控振盪器分析 21
3.4 重要參數 23
3.4.1 功率消耗(Power Consumption) 23
3.4.2 調變範圍(Tuning Range) 23
3.4.3 相位雜訊(Phase Noise) 24
3.4.4 輸出功率(Output Power) 24
3.4.5 相位誤差(Phase Error) 24
3.4.6 振幅誤差(Amplitude Error) 24
3.4.7 I/Q誤差與考慮四相位輸出時的誤差 25
第四章 電容性源極衰退與自發性轉導匹配四相位振盪電路 26
4.1 架構研究與文獻回顧 26
4.1.1 電容性源極衰退振盪器[7] 27
4.1.2 自發性轉導匹配[8] 27
4.2 本論文提出電路 28
4.2.1 大訊號分析 29
4.2.2 相移分析 30
4.2.3 振盪頻率 32
4.2.4 轉導衰退 33
4.2.5 相位雜訊分析 35
4.2.6 訊號準確性 38
4.2.7 電路設計流程 39
4.3 規格 40
第五章 設計、模擬與量測 41
5.1 設計流程 41
5.2 四相位振盪器晶片設計 42
5.3 四相位振盪器晶片模擬 45
5.4 論文所提電路量測與比較表 48
第六章 結論與未來研究方向 54
6.1 結論 54
6.2 未來方向 54
參考文獻 55
口委建議及回覆 58

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