進階搜尋


下載電子全文  
系統識別號 U0026-2108201415450400
論文名稱(中文) 毫米波CMOS寬頻可變增益低雜訊放大器及使用前置失真線性器之94-GHz CMOS功率放大器
論文名稱(英文) Millimeter-Wave CMOS Wideband Variable-Gain Low-Noise Amplifier and 94-GHz CMOS Power Amplifier with Built-in Pre-distortion Linearizer
校院名稱 成功大學
系所名稱(中) 電腦與通信工程研究所
系所名稱(英) Institute of Computer & Communication
學年度 102
學期 2
出版年 103
研究生(中文) 余俊翰
研究生(英文) Chun-Han Yu
學號 Q36014594
學位類別 碩士
語文別 中文
論文頁數 70頁
口試委員 指導教授-莊惠如
口試委員-黃尊禧
口試委員-洪子聖
口試委員-張盛富
口試委員-張嘉展
中文關鍵字 寬頻  毫米波  可變增益低雜訊放大器  功率放大器  前置失真線性器 
英文關鍵字 wideband  millimeter-wave (MMW)  variable-gain low-noise amplifier (VG-LNA)  power amplifier (PA)  pre-distortion linearizer 
學科別分類
中文摘要 本論文研製毫米波CMOS寬頻可變增益低雜訊放大器及使用前置失真線性器之94-GHz CMOS功率放大器,採用TSMC CMOS 0.18-μm製程或90-nm GUTM製程進行設計。12–25 GHz CMOS寬頻可變增益低雜訊放大器以電流控制機制(current steering)來控制電晶體轉導值使其主體電流產生變化以達增益之調控;寬頻設計的部份則利用電阻式回授的方式並加上額外之電感、電容來做為匹配網路。50–67 GHz CMOS寬頻可變增益放大器此架構的可變增益設計以及寬頻設計的部份與12–25 GHz CMOS寬頻可變增益低雜訊放大器設計類似,主要差異為:此寬頻放大器中額外使用了增益強化(gain boosting)電感來增加整體的增益表現,同時額外多使用一個輸出緩衝器(test buffer)來作為輸出端的寬頻匹配元件與提升增益之用。使用前置失真線性器之94-GHz CMOS功率放大器設計上採用串接四級common-source (CS)的cascode架構來提高增益輸出以減輕PA前端輸入電路的負擔,而為加強電路的線性度特性,此架構使用一線性器來強化IP1dB特性,同時級間匹配採用能達到較小面積的匹配網路以利系統整合。電路設計以Agilent ADS與Ansoft 3-D全波電磁模擬軟體HFSS進行模擬,量測部分則是採用on-wafer方式進行,根據欲量測特性之不同,相關量測方式亦有所調整。
英文摘要 This thesis presents the research on millimeter-wave (MMW) CMOS wideband variable-gain low-noise amplifiers (VG-LNAs) and a 94-GHz CMOS power amplifier (PA) with built-in pre-distortion linearizer, implemented by standard TSMC 0.18-μm or 90-nm GUTM CMOS process. To obtaine wideband frequency response, the resistive-feedback skill with additional passive components is used as the matching network. In the 60-GHz VG-LNA design, a gain boosting inductor is used in order to obtain a better gain performance. In 94-GHz CMOS PA design, a four stage CS cascade structure is adopted for output gain enhancement. Futhermore, the linearity performance of designed PA such as IP1dB is improved by the built-in pre-distortion linearizer. The measured performances of the designed MMW CMOS RFICs are all performed by using the on-wafer measurement. Simulation and measurement results are compared and discussed.
論文目次 第一章 緒論 1
1.1 研究動機與背景 1
1.2 論文架構 1

第二章 12–25 GHz CMOS寬頻可變增益低雜訊放大器 3
2.1 可變增益低雜訊放大器於系統應用之簡介 3
2.2 常見可變增益放大器及衰減器架構介紹 5
2.3 低雜訊放大器介紹 9
2.3.1多級電路系統雜訊指數 9
2.3.2 CMOS放大器雜訊來源 10
2.4常見之寬頻放大器設計 11
2.5 12–25 GHz CMOS寬頻可變增益放大器設計簡介 15
2.5.1 電路設計說明與考量 15
2.5.2設計流程總結 21
2.5.3模擬與量測結果 22
2.5.4 結果與討論 27

第三章 50–67 GHz CMOS寬頻可變增益低雜訊放大器 29
3.1 設計簡介 29
3.1.1 電路設計說明與考量 30
3.1.2設計流程總結 33
3.1.3 結果與討論 40

第四章 使用前置失真線性器之94-GHz CMOS功率放大器 43
4.1 功率放大器簡介 43
4.1.1 架構種類與重要參數 44
4.1.2驅動級線性度之設計考量 46
4.1.3匹配考量 47
4.1.4 穩定度考量 48
4.2 使用前置失真線性器之94-GHz CMOS功率放大器設計簡介 48
4.2.1電路設計說明與考量 49
4.2.2設計流程總結 53
4.2.3模擬與量測結果 55
4.2.4 結果與討論 58

第五章 結論 63

參考文獻 65
參考文獻 [1] J. A. Howarth, A. P. Lauterbach, M. L. J. Boers, L. M. Davis, A. Parker, J. Harrison, J. Rathmell, M. Batty, W. Cowley, C. Burnet, L. Hall, D. Abbott, and N. Weste, “60 GHz radios: enabling next-generation wireless applications,” in Proc. TENCON 2005 region 10, Nov. 2005, pp. 1–6.
[2] RF atmospheric absorption / ducting [Online]. Available : http://www.tscm.com/rf_absor.pdf
[3] IEEE 802.15 Working Group for WPAN. [Online]. Available: http://www.ieee802.org/15
[4] B. Heydari, M. Bohsali, E. Adabi, and A. M. Niknejad, “Low-power mm-wave components up to 104 GHz in 90 nm CMOS,” in IEEE Int. Solid-State Circuits Conf. Dig., Feb. 2007, pp. 200–201.
[5] Z. M. Tsai, M. C. Yeh, M. F. Lei, H. Y. Chang, C. S. Lin, and H. Wang, “FET-integrated CPW and the application in filter synthesis design method on traveling-wave switch above 100 GHz,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 5, pp. 2090–2097, May 2006.
[6] A. Arbabian, S. Callender, S. Kang, M. Rangwala, and A. M. Niknejad, “A 94 GHz mm-Wave-to-Baseband Pulsed-Radar Transceiver with Applications in Imaging and Gesture Recognition,” IEEE J. Solid-State Circuits, vol. 48, no. 4, pp. 1055–1071, Apr. 2013.
[7] A. Arbabian, S. Callender, S. Kang, B. Afshar, J. –C. Chien, and A. M. Niknejad, “A 90 GHz Hybrid Switching Pulsed-Transmitter for Medical Imaging,” IEEE J. Solid-State Circuits, vol. 45, no. 12, pp. 2667–2681, Dec 2010.
[8] P. –C. Huang, M. –D. Tsai, H. Wang, C. –H. Chen, and C. –S. Chang, “A 114GHz VCO in 0.13um CMOS Technology,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Paper, Feb. 2005, pp.404-405.
[9] R. S. P. Tam “CMOS variable gain amplifier,” term paper, University of Toronto, 2002.
[10] 歐雅文,毫米波CMOS次諧波降頻混頻器與低相位變化之可變增益放大器射頻晶片之研製,國立成功大學電腦與通信工程研究所碩士論文,民國一百年。
[11] B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2001.
[12] K. L. Feng, “Dual-band high-linearity variable-gain low-noise amplifiers for wireless applications,” in IEEE Int. Solid-State Circuits Conf., Feb. 1999 pp. 224–225.
[13] J. Xiao, I. Mehr and J. Silva-Martinez “A high dynamic range CMOS variable gain amplifier for mobile DTV tuner,” IEEE J. Solid-State Circuits., vol. 42, pp. 292–301, Feb. 2007.
[14] C.-C. Kuo, Z.-M. Tsai, J.-H. Tsai, H. Wang, “A 71–76 GHz CMOS variable gain amplifier using current steering technique,” in IEEE Radio Freq. Integr. Circuits Symp. Dig., Jun. 2008, pp. 609–612.
[15] G. Gonzalez, Microwave Transistor Amplifiers, 2nd ed., Prentice Hall, Inc., 1997.
[16] T. Chang, J. Chen, L. A. Rigge, and J. Lin, “ESD-Protected wideband CMOS LNAs using modified resistive feedback techniques with chip-on-board packaging,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 8, pp. 1817–1826, Aug. 2008.
[17] J.-H. C. Zhan and S. S. Taylor, “A 5 GHz resistive-feedback CMOS LNA for low-cost multi-standard applications,” in IEEE Int. Solid-State Circuit Conf. Dig., Feb. 2006, pp. 721–730.
[18] B. G. Perumana, J.-H. C. Zhan, S. S. Taylor, and J. Laskar, “A 0.5–6 GHz improved linearity, resistive feedback 90-nm CMOS LNA,” in Proc. IEEE Asian Solid-State Circuits Conf.,no. 2006, pp. 263–266.
[19] B. G. Perumana, J.-H. C. Zhan, S. S. Taylor, B. R. Carlton, and J. Laskar, “A 9.2mW, 4–8 GHz resistive feedback CMOS LNA with 24.4 dB gain, 2 dB noise figure, and 21.5 dBm output IP3,” in Proc. IEEE Topical Meeting Silicon Monolith, Integr. Circuits RF Syst., Jan. 2008, pp. 34–37.
[20] 鐘豪文,超寬頻UWB無線射頻收發機之寬頻CMOS RFICs的研究設計,國立成功大學電腦與通信工程研究所碩士論文,民國九十五年。
[21] A. Ismail, and A. A. Abidi, “A 3-10-GHz low-noise amplifier with wideband LC-ladder matching network,” IEEE J. Solid-State Circuits, vol. 39, no. 12, pp. 2269-2277, Dec. 2004.
[22] A. Bevilacqua, and A. M. Niknejad, “An ultrawideband CMOS low-noise amplifier for 3.1-10.6-GHz wireless receivers,” IEEE J. Solid-State Circuits, vol. 39, no. 12, pp. 2259-2268, Dec. 2004.
[23] H. -J. Lee, D. S. Ha, and S.S. Choi, ”A systematic approach to CMOS low noise amplifier design for ultrawideband applications,” in IEEE Int. Symp. on Circuits and Systems, vol. 4, pp. 3962-3965, May 2005.
[24] Y. –S. Lin, C. –Z. Chen, H. –Y. Yang, C. –C. Chen, J. –H. Lee, G. –W. Huang, and S. –S. Lu, “Analysis and Design of a CMOS UWB LNA With Dual-RLC-Branch Wideband Input Matching Network,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 2, pp. 287–296, Feb. 2010.
[25] F. Ellinger and H. Jäckel, “Low-Cost BiCMOS Variable Gain LNA at Ku-Band With Ultra-Low Power Consumption,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 2, pp. 702–708, Feb. 2004.
[26] S. -C Shin, S. –F. Lai, K. -Y Lin, M. –D. Tsai, H. Wang, C. –S. Chang, and Y. -C Tsai, “18-26 GHz Low-Noise Amplifiers Using 130- and 90-nm Bulk CMOS Technologies,” IEEE Radio Frequency Integrated Circuits (RFIC) Symp, Jun. 2005, pp. 47–50.
[27] V. Jain, S. Sundararaman, and P. Heydari, “A CMOS 22–29 GHz receiver front-end for UWB automotive pulse-radars,” IEEE Custom Intergrated Circuits Conf, pp. 757–760, Sep. 2007.
[28] H.-Y. Yang, Y.-S. Lin, and C.-C. Chen, “0.18 μm 21–27 GHz CMOS UWB LNA with 9.3±1.3 dB gain and 103.9+8.1 ps group delay,” Electron. Lett., vol. 44, no. 17, pp. 1014–1016, Aug. 2008.
[29] M. El-Nozahi, E. Sanchez-Sinencio, and K. Entesari, “A millimeterwave(23–32 GHz) wideband BiCMOS low noise amplifier,” IEEE J.Solid-State Circuits, vol. 45, no. 2, pp. 289–299, Feb. 2010.
[30] M. –H. Tsai, Shawn S. H. Hsu, F. –L. Hsueh, and C. –P. Jou, “ESD-Protected K-Band Low-Noise Amplifiers Using RF Junction Varactors in 65-nm CMOS,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 12, pp. 3455–3462, Dec. 2011.
[31] B. Seo and S. Jeon, "An 18–32 GHz Ultra Wideband Low-Noise Amplifier with a Low Variation of Group Delay," in Proc. IEEE Int. Microw. Symp., May 2010, pp. 489–492.
[32] H. –H. Hsieh, P.-Y. Wu, C. –P. J., F. –L. Hsueh, and G. –W. Huang "60GHz High-Gain Low-Noise Amplifiers with a Common-Gate Inductive Feedback in 65nm CMOS," IEEE Radio Frequency Integrated Circuits (RFIC) Symp., June 8–10, 2011.
[33] S. Shekhar, J. S. Walling, and D. J. Allstot, “Bandwidth Extension Techniques for CMOS Amplifiers,” IEEE J. Solid-State Circuits, vol. 41, no. 11, pp. 2424-2439, Nov. 2006.
[34] C. Weyers, P. Mayr, J. W. Kunze, and U. Langmann, “A 22.3 dB voltage gain 6.1 dB NF 60 GHz LNA in 65 nm CMOS with differential output,” in Proc. IEEE Int. Solid-State Circuits Conf., Feb. 2008,pp. 192–606.
[35] A. Natarajan, S. Nicolson, M.-D. Tsai, and B. Floyd, “A 60 GHz variable-gain LNA in 65 nm CMOS,” in Proc. IEEE Asian Solid-State Circuits Conf., Nov. 2008, pp. 117–120.
[36] C.-C. Chen, Y.-S. Lin, P.-L. Huang, J.-F. Chang, and S.-S. Lu, “A 4.9 dB NF 53.5–62 GHz micro-machined CMOS wideband LNA with small group-delay-variation,” in Proc. IEEE Int. Microw. Symp., May 2010, pp. 489–492.
[37] Y.-K. Hsieh and J.-L. Kuo, H. Wang and L. –H. Lu, “A 60 GHz Broadband Low-Noise Amplifier WithVariable-Gain Control in 65 nm CMOS” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 11, pp. 610–612, Nov. 2011.
[38] Steve C. Cripps, “RF Power Amplifiers for Wireless Communications,” 2nd ed., Artech House, 2006.
[39] 張盛富,張嘉展,“無線通訊射頻晶片模組設計-射頻晶片篇,” 全華科技,2008。
[40] B. Razavi, “RF Microelectronics,” 2nd ed., Prentice Hall, Inc., 1998.
[41] 廖哲宏,應用於IEEE 802.11a WLAN之5.7 GHz CMOS 射頻接收機及功率放大器RFICs,成功大學電腦與通信工程研究所碩士論文,民國九十二年。
[42] D. M. Pozar, Microwave Engineering, 3rd ed., John Wiley and Sons, Inc., 2005.
[43] C.-Y. Law, and A.-V. Pham, “A high-gain 60GHz power amplifier with 20dBm output power in 90nm CMOS,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., pp. 426–427, 7-11 Feb. 2010.
[44] A. Komijani, A. Natarajan, and A. Hajimiri, “A 24-GHz, +14.5-dBm fully integrated power amplifier in 0.18-μm CMOS,” IEEE J. Solid-State Circuits, vol. 40, no. 9, pp. 1901–1908, Sep. 2005.
[45] J.-H Tsai, C.-H. Wu, H.-Y. Yang and T. –W. Huang “A 60 GHz CMOS Power Amplifier With Built-in Pre-Distortion Linearizer,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 12, pp. 676–678, Dec.2011.
[46] J.-H. Tsai, H.-Y. Chang, P.-S. Wu, Y.-L. Lee, T.-W. Huang, and H. Wang, “Design and analysis of a 44 GHz MMIC low-loss built-in linearizer for high-linearity medium power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 6, pp. 2487–2496, Jun. 2006.
[47] Jiang, Y. S. et al.: ‘A 86-to-108 GHz amplifier in 90nm CMOS’, IEEE Microwave and Wireless Components Letters, pp. 124-126, Feb. 2008.
[48] Deferm, N. et al.: ‘A 94GHz differential power amplifier in 45nm LP CMOS’, IEEE Radio Frequency Integrated Circuits (RFIC) Symp., pp. 1-4, June. 2011.
[49] 郭信智,應用於60-GHz CMOS毫米波射頻接收機前端電路之研製,國立成功大學電腦與通信工程研究所碩士論文,民國九十七年。
[50] N. O. Sokal, and A. D. Sokal, “Class E–A new class of high-efficiency tuned single-ended switching power amplifiers,” IEEE J. Solid-State Circuits, vol. sc-10, no. 3, pp. 168–176, Jun. 1975.
[51] C. -H. Yu, P. -H. Lo, J. -Y. Lyu, H. -C. Kuo, and H. -R. Chuang, “Integrated 60-GHz CMOS variable-gain low-noise amplifier and full 360° phase shifter for phased-array RF receiving system,” in Proc. IEEE Radio Wireless Symp. pp. 59 – 61, Jun. 2014.
[52] Y. Wu, S. –C. Huang, C. –H. Yu, W. –Y. Ruan and H. -R Chuang, “60-GHz CMOS artificial magnetic conductor on-chip 2×2 monopole - antenna phased array RF receiving system with integrated variable-gain low-noise amplifier and phase shifter,” in Proc. IEEE Int. Microw. Symp., Jun 2014, pp. 1–3.
[53] R. J. Langley, and A. J. Drinkwater, “An improved empirical model for the Jerusalem cross,” IEEE Proc. H, Microwaves, Opt. & Antennas, vol. 129, pp. 1-6, Feb., 1982.
[54] M. K. T. Al-Nuaimi, and W. G. Whittow, “Low profile dipole antenna backed by isotropic Artificial Magnetic Conductor reflector,” in Proc. IEEE Eur Conf on Antennas and Propagation (EuCAP),. pp. 1 – 5, Apr. 2010.
[55] A. E. I. Lamminen, A. R. Vimpari, and J. Saily, “UC-EBG on LTCC for 60-GHz Frequency Band Antenna Application,” IEEE Trans. Antennas Propag., vol. 57, no. 10, Oct., 2009.
[56] F. Yang, and Y. Rahmat-Samii, “Reflection Phase Characterization of the EBG Ground Plane for Low Profile Wire Antenna Application,” IEEE Trans. Antenna Propag., vol. 51, pp. 2691-2703, Oct. 2003.
[57] C. R. Simovski, P. de Maagt, and I. V. Melchakova, “High-Impedance Surface Having Stable Resonance with Respect to Polarization Incidence Angle,” IEEE Trans. Antennas Propag., vol. 53, no. 3, Mar., 2005.
[58] X. Y. Bao, Y. X. Guo and Y. Z. Xiong, “60-GHz AMC-Based Circularly Polarized On-Chip Antenna Using Standard 0.18-μm CMOS Technology,” IEEE Trans. Antennas Propag., vol. 60, no. 5, May, 2012.
[59] C. A. Balanis, Antenna Theory and Design, 3rd ed. New York: Wiley, 2005
[60] W. Shin, O. Inac, Y.C. Ou, B. Ku, and G. M. Rebeiz, “A 108-114 GHz 4x4 Wafer-Scale Phased Array Transmitter with High-Efficiency On-Chip Antennas,” IEEE J. Solid-State Circuits, vol. 48, no. 9, pp. 2041–2055, Sep. 2013.
[61] 王惠弘,15-28 GHz CMOS 寬頻低雜訊放大器及60-GHz 非接觸式人體呼吸心跳訊號感測系統之低雜訊放大器/IQ混頻器電路之研製,國立成功大學電腦與通信工程研究所碩士論文,民國一零一年。
[62] 郭奇昕,毫米波CMOS高隔離度射頻收發開關及功率放大器研製,國立成功大學電腦與通信工程研究所碩士論文,民國一零一年。
論文全文使用權限
  • 同意授權校內瀏覽/列印電子全文服務,於2019-09-04起公開。
  • 同意授權校外瀏覽/列印電子全文服務,於2019-09-04起公開。


  • 如您有疑問,請聯絡圖書館
    聯絡電話:(06)2757575#65773
    聯絡E-mail:etds@email.ncku.edu.tw