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系統識別號 U0026-2012201318364400
論文名稱(中文) 寬頻分散式混頻器、正交本地振盪器以及三模除頻器與再生式除頻器的研製
論文名稱(英文) Broadband Distributed Mixer, Quadrature Local Oscillator, Triple-Modulus Frequency Divider, and Regenerative Frequency Dividers
校院名稱 成功大學
系所名稱(中) 微電子工程研究所
系所名稱(英) Institute of Microelectronics
學年度 102
學期 1
出版年 102
研究生(中文) 林育聖
研究生(英文) Yu-Sheng Lin
學號 Q18971154
學位類別 博士
語文別 英文
論文頁數 155頁
口試委員 指導教授-王永和
口試委員-荊鳳德
口試委員-張勝良
口試委員-蔡政翰
口試委員-王瑞祿
口試委員-吳建銘
共同指導教授-盧春林
口試委員-黃尊禧
召集委員-洪茂峰
中文關鍵字 互補金屬氧化物半導體  電流模式邏輯電路環型振盪器  分散式混頻器  直接降頻接收機  三倍頻器  多相位本地振盪器  再生式除頻器  三模數。 
英文關鍵字 CMOS  current-mode-logic (CML) ring oscillator  distributed Mixer  direct-conversion receiver  frequency tripler  multi-phase local oscillator (LO)  regenerative frequency divider (RFD)  triple-modulus. 
學科別分類
中文摘要 本論文主要研究使用互補式金氧半電晶體製程製作之關鍵射頻元件,以應用於直接降頻接收機與多相位本地振盪器。本論文分成四大部份。第一部份,一個寬頻分散式混頻器使用疊接互補式開關對來改善埠對埠隔離度,同時將其設計成四級分散式架構以實現寬頻及低轉換損耗。所量測之頻寬為5−45 GHz,且LO埠對RF埠之隔離度為33−47 dB、LO埠對IF埠之隔離度為28−53 dB、RF埠對IF埠之隔離度為32−48 dB。第二部份發表一個由電流模式邏輯電路之環形振盪器與兩個三倍頻器所構成之低功耗正交本地振盪器。電流模式邏輯電路之環形振盪器產生正交基頻訊號與差動二倍頻訊號,並且趨動下一級之兩個單平衡混頻器,使頻率可以被提升三倍,同時又能獲得正交輸出與低功耗等優點。當消耗8.7 mW直流功率,可實現16.56−19.8 GHz之頻率可調範圍。第三部份提出一個三模除頻器,它使用三組開關嵌入到再生除頻器之訊號迴路中去產生除二、除三以及除四的功能,除頻器操作在這些模式下所對應之等效模型也被用來說明其工作原理。當操作在除二、除三及除四三種模式下,電路之鎖頻範圍分別為16−23.8 GHz、12.3−18 GHz以及16.8−22.8 GHz。論文的最後一部份則設計三種再生式除頻器。第一種再生式除頻器使用變壓器耦合技術以及源級注入電流模式邏輯電路除頻器來改善迴路除頻器之輸入靈敏度與操作範圍,此外,使用底部本地振盪驅動級之次諧波混頻器也被用來最佳化其轉換增益。該除頻器展示其鎖頻範圍為20.1−24.8 GHz以及6.8 mW之直流功耗。第二種再生除頻器發表一個除三與一個除五除頻器,這兩個除頻器藉由使用除二及除四之正交注入電流模式邏輯電路迴路除頻器去增加鎖頻範圍,同時可實現正交輸入與正交輸出之特性。該除三與除五再生式除頻器經驗證可獲得超寬之鎖頻範圍,分別為9−14.7 GHz 以及7.2−19 GHz。最後,第三種除頻器則介紹了除三、除四以及除八之再生式除頻器,這三個除頻器皆使用電流模式邏輯電路迴路除頻器來增加它們的鎖頻範圍以及使用主動平衡式混頻器(雙平衡吉爾伯混頻器、使用底部本地振盪驅動級之二次諧波混頻器以及四次諧波混頻器)去獲得良好的轉換增益。另外,除二電流模式邏輯電路迴路除頻器之理論鎖頻範圍被分析,基於兩級電流模式邏輯電路架構之除四、八相位迴路除頻器也被設計。經量測結果得知,所製造的除四、八相位電流模式邏輯電路除頻器以及除三、除四與除八之再生式除頻器,其鎖頻範圍分別為1−8 GHz、6.3−10.5 GHz、13.2−18.4 GHz、以及16.8−26 GHz.。
英文摘要 This dissertation investigates the critical RF components fabricated by a standard CMOS process for application into the direct-conversion receiver and the multi-phase local oscillator (LO). There are four parts in this dissertation. In the first part, a broadband distributed mixer uses a cascoded complementary switching pair to improve port-to-port isolation and forms a four-stage distributed topology to achieve a broad bandwidth and reduce conversion loss (CL). The measured operation bandwidth was from 5−45 GHz, and the LO-to-RF, LO-to-IF, and RF-to-IF isolations were from 33−47 dB, 28−53 dB, and 32−48 dB, respectively. The second part presents a low-power quadrature LO, which is composed of a current-mode-logic (CML) ring oscillator integrated with two frequency triplers. The CML ring oscillator generates the quadrature signals and the frequency-doubled signals to drive two single-balanced mixers for up-converting the frequency by triple and achieving quadrature outputs and low power consumption. When consuming 8.7 mW of direct-current (DC) power, the frequency tuning range of 16.56−19.8 GHz was achieved. The third part proposes a triple-modulus FD which uses three pairs of switches inserted in the signal paths of the regenerative divider to provide three selectable division ratios of 1/2, 1/3, and 1/4. The corresponding behavior models of the divider in these modes are also utilized to explain the operation principle. Operated at 1/2, 1/3, and 1/4 dividing modes, the circuit obtained the locking ranges of 16−23.8 GHz, 12.3−18 GHz, and 16.8−22.8 GHz. The last part designs three kinds of RFDs. The first-case RFD uses a transformer-coupling technique and a source-injected current-mode-logic (S-CML) FD to improve the input sensitivity and the operation range of the loop divider. A subharmonic mixer (SHM) with bottom LO was used to optimize the conversion gain. The divider exhibited a locking range of 20.1−24.8 GHz with a 6.8 mW of power consumption. The second-case RFD presents a ÷3 and ÷5 RFDs by using a ÷2 and ÷4 quadrature-injected CML loop dividers to widen their locking ranges and achieve quadrature inputs and quadrature outputs. The ÷3 and the ÷5 dividers were demonstrated with the ultra-wide locking ranges of 9−14.7 GHz and 7.2−19 GHz, respectively. Finally, the third case introduces three RFDs with a division ratio of 3, 4, and 8, respectively. These RFDs use CML loop dividers to widen their locking ranges and active balanced mixers (i.e., double-balanced Gilbert mixer, and the 2× and 4× SHMs with bottom LO) to obtain good conversion gain. In addition, the theoretical locking range of the ÷2 CML loop divider is analyzed and a ÷4 octet loop divider based on a two-stage CML divider is designed. Measured results showed that the fabricated ÷4 octet CML FD and ÷3, ÷4, and ÷8 RFDs obtained the locking ranges of 1−8 GHz, 6.3−10.5 GHz, 13.2−18.4 GHz, and 16.8−26 GHz, respectively.
論文目次 ABSTRACT (Chinese).......................................I
ABSTRACT (English).......................................III
ACKONWLEDGEMENT..........................................V
CONTENTS.................................................VII
FIGURE CAPTIONS..........................................XI
TABLE CAPTIONS...........................................XVI

CHAPTER 1 Introduction
1.1 Background.......................................1
1.1.1 Direct-Conversion Receiver.......................1
1.1.2 Multi-Phase Local Oscillator.....................3
1.1.2.1 PLL-Based Frequency Synthesizer..................4
1.1.2.2 Multi-Phase Generator............................6
1.2 Research Motivation..............................6
1.3 Dissertation Organization........................7

CHAPTER 2 A Broadband Distributed Mixer with Cascoded Complementary Switching Pairs
2.1 Introduction.....................................10
2.2 Operation Principle of the Cascoded Mixer........12
2.3 Design of the Proposed Distributed Mixer.........14
2.4 Implementation and Experimental Results..........19
2.5 Performance Comparison...........................24
2.6 Summary..........................................25

CHAPTER 3 A Low-power Quadrature Local Oscillator with CML Ring Oscillator and Frequency Triplers
3.1 Introduction.....................................26
3.2 Design of the Proposed Local Oscillator..........27
3.3 Implementation and Experimental Results..........34
3.4 Performance Comparison...........................37
3.5 Summary..........................................38

CHAPTER 4 A Triple-Modulus Frequency Divider with Embedded Switches
4.1 Introduction.....................................39
4.2 Behavioral Model and Operation Principle.........40
4.3 Design of the Proposed Triple-Modulus Frequency
Divider..........................................44
4.4 Implementation and Experimental Results..........46
4.5 Performance Summary..............................51
4.6 Summary..........................................52
CAPTER 5 Development of Wide-Locking-Range Regenerative Frequency Dividers
5.1 A Divide-by-Four Transformer-Coupled Regenerative
Frequency Divider with Quadrature Outputs........53
5.1.1 Introduction.....................................53
5.1.2 Design of the ÷4 Transformer-coupled Regenerative
Frequency Divider................................54
5.1.3 Implementation and Experimental Results..........58
5.1.4 Performance Comparison...........................62
5.1.5 Summary..........................................63
5.2 Ultra-Wide-Locking Range Regenerative Frequency
Dividers with Quadrature-Injection Current-Mode-
Logic Loop Dividers..............................64
5.2.1 Introduction.....................................64
5.2.2 Architecture and Operation Principle…............65
5.2.3 Design of the ÷3 and ÷5 Regenerative Frequency
Dividers.........................................66
5.2.4 Implementation and Experimental Results..........69
5.2.5 Performance Comparison...........................74
5.2.6 Summary..........................................75
5.3 Regenerative Frequency Dividers with Active Balanced
Mixers and Current-Mode-Logic Loop Dividers......75
5.3.1 Introduction.....................................75
5.3.2 General Architecture and Operation Principle.....78
5.3.3 Design and Analysis of the Current-Mode-Logic Loop
Dividers.........................................79
5.3.3.1 Locking Range Analysis for ÷2 Current-Mode-Logic
Frequency Divider................................79
5.3.3.2 Design of the ÷4 Current-Mode-Logic Frequency
Divider with Octet Output........................91
5.3.3.3 Implementation and Experimental Results..........93
5.3.4 Design of the ÷3, ÷4, and ÷8 Regenerative Frequency
Dividers.........................................99
5.3.4.1 C- to X-band ÷3 RFD..............................99
5.3.4.2 Ku-band ÷4 RFD...................................102
5.3.4.3 Ku-to-K band ÷8 RFD..............................107
5.3.4.4 Implementation and Experimental Results..........111
5.4 Performance Comparison...........................124
5.5 Summary..........................................126

CHAPTER 6 Conclusions and Future Works
6.1 Conclusions......................................127
6.2 Future Works.....................................129

APPENDIX A Low-Power K-band Frequency Quintupler with Current-Reused and Harmonic-Enhanced Techniques
A.1 Introduction.....................................132
A.2 Design of the Proposed Frequency Quintupler......133
A.3 Implementation and Experimental Results..........136
A.4 Performance Comparison and Summary...............140

REFERENCES...............................................142
PUBLICATION LIST.........................................153
VITA.....................................................155
參考文獻 [1] Thomas H. Lee, The design of CMOS radio-frequency integrated circuits, 2nd edition, Cambridge University Press, 2003.
[2] B. Razavi, RF Microelectronics, 2nd edition, New Jersey: Prentice Hall, 2012.
[3] B. Razavi, “A 2.4 GHz CMOS receiver for IEEE 802.11 wireless LAN’s,” IEEE J. Solid-State Circuits, vol. 34, pp. 1382−1385, Oct. 1999.
[4] S. A. Maas, Microwave Mixers, 2nd ed. Norwood, MA: Artech House, 1993.
[5] T. Yamaji, H. Tanimoto, and H. Kokatsu, “An I/Q active balanced harmonic mixer with IM2 cancelers and a 45 degree phase shifter,” in IEEE Solid-State Circuits Conf. Dig. Tech. Papers, pp. 368−369, 1998.
[6] Z. Zhang, and J. Lau, “A flicker-noise-free DC-offset-free harmonic mixer in a CMOS process,” in IEEE radio and Wireless Conf. Dig. Tech. Papers, pp. 113−116, 2001.
[7] L. Sheng, J. C. Jensen, and L. E. Larson, “A wide-bandwidth Si/SiGe HBT direct conversion sub-harmonic mixer/downconverter,” IEEE J. Solid-State Circuits, vol. 35, pp. 1329−1337, Sept. 2000.
[8] J. Kim. J. K. Kim, B. J. Lee, N. Kim, D. K. Jeong, and W. Kim, “A 20-GHz phase-locked loop for 40 Gb/s serializing transimitter in 0.13 μm CMOS,” in Symp. VLSI circuits Dig. Tech. Papers, pp. 144−147, 2005.
[9] H. Zheng and H. C. Luong, “A 1.5 V 3.1 GHz−8 GHz CMOS synthesizer for 9-band MB-OFDM UWB transceivers,” IEEE J. Solid-State Circuits, vol. 42, no. 6, pp. 1250−1260, Jun. 2007.
[10] P. Y Deng and J. F. Kiang, “A 5-GHz CMOS frequency synthesizer with an injection-locked frequency divider and differential switched capacitors,” IEEE Trans. Circuits and Systems I, reg. paper, vo. 56, no. 2, pp. 320−326, Feb. 2009..
[11] A. Mazzanti, M. B. Vahidfar, M. Sosio, and F. Svelto, “A low phase-noise multi-phase LO generator for wideband demodulators based on reconfigurable sub-harmonic mixers,” IEEE J. Solid-State Circuits, vol. 45, no. 10, pp. 2104−2115, Oct. 2010.
[12] J. S. Syu and C. C. Meng, “Low-power sub-harmonic direct-conversion receiver with tunable RF LNA and wideband LO generator at U-NII bands,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 3, pp. 555−566, Mar. 2012.
[13] Y. S. Lin, Y. H. Wang, H. S. Chiu, C. L. Lu, and C. L. Chuang, “A 3.2-GHz quadrature signal generator based on a single-stage LC VCO in 0.25-μm CMOS process,” Advanced in Mathematical Computational Methods, vol. 1, no. 1, pp. 28−33, Sep. 2011.
[14] Y. H. Chen, H. H. Hsieh, and L. H. Lu, “A 24-GHz receiver frontend with an LO signal generator in 0.18-μm CMOS,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 5, pp. 1043−1051, May 2008.
[15] K. G. Park, C. Y. Jeong, J. W. Park, J. G. Jo, and C. Yoo, “Current reusing VCO and divide-by-two frequency divider for quadrature LO generation,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 6, pp. 413−415, Jun. 2008.
[16] H. Veenstra, E. van der Heijden, M. Notten, and G. Dolmans, “A SiGe-BiCMOS UWB receiver for 24 GHz short-range automotive radar application,” in IEEE MTT-S Int. Dig., 2007, pp. 1791−1794.
[17] H. Zheng and H. C. Lunog, “A double-balanced quadrature-Input Quadrature-Output Regenerative Frequency divider for UWB synthesizer applications,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 55, no. 9, pp. 2944−2951, Oct. 2008.
[18] C. Y. Wu, M. C. Chen, and Y. K. Lo, “A phase-locked loop with injection-locked frequency multiplier in 0.18-μm CMOS for V-band applications,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 7, pp. 1629−1636, Jul. 2009.
[19] A. Rofougaran, J. Rael, M. Rofougaran, and A. Abidi, “A 900-MHz CMOS LC-oscillator with quadrature outputs,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., 1996, pp. 392−393.
[20] P. Andreani, A. Bonfanti, L. Romano, and C. Samori, “Analysis and design of a 1.8-GHz CMOS LC quadrature VCO,” IEEE J. Solid-State Circuits, vol. 37, no. 12, pp. 1737−1747, Dec. 2002.
[21] R. Aparicio and A. Hajimiri, “A noise-shifting differential Coplitts VCO,” IEEE J. Solid-State Circuits, vol. 37, no. 12, pp. 1728−1736, Dec. 2002.
[22] F. Cardinal, H. An, I. Mag, and R. Smith, “A high-performance broadband MMIC pHEMT resistive drain mixer for 28–40-GHz band PCN applications,” in IEEE Microwave Millimeter-Wave Monolithic Circuits Symp, Dig., Jun. 1996, pp. 47–50.
[23] M. L. de la Fuente, J. Portilla, and E. Artal, “Low-noise Ku-band drain mixer using p-HEMT technology,” in IEEE Int. Conf. Electronics, Circuits and Systems, Sep. 1998, pp. 175–178.
[24] F. Ellinger, L. C. Rodoni, G. Sialm, C. Kromer, G. von Buren, M. L. Schmatz, C. Menolfi, T. Toifl, T. Morf, M. Kossel, and H. Jackel, “30–40-GHz drain-pumped passive-mixer MMIC fabricated on VLSI SOI CMOS technology,” IEEE Tran. Microw. Theory Tech., vol. 52, no. 5, pp. 1382–1391, May 2004.
[25] K. S. Ang, S. Nam, and I. D. Robertson, “A 2 to 18 GHz monolithic resistive distributed mixer,” in Eur. Microw. Conf. Dig., Oct. 1999, pp. 222–225.
[26] K. L. Deng and H. Wang, “A 3–33 GHz pHEMT MMIC distributed drain mixer,” in Proc. Radio Freq. Integr. Circuits Symp., Jun. 2002, pp. 151–154.
[27] H. Y. Yang, J. H. Tsai, C. H. Wang, C. S. Lin, W. L. Lin, K. Y. Lin, T. W. Huang, and H. Wang, “Design and analysis of a 0.8–77.5-GHz ultra-broadband distributed drain mixer using 0.13-μm CMOS technology,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 3, pp. 562–572, Mar. 2009.
[28] H. Y. Yang, J. H. Tsai, T. W. Huang, and H. Wang, “Analysis of a new 33–58-GHz double-balanced drain mixer in 90-nm CMOS technology,” IEEE Tran. Microw. Theory Tech., vol. 60, no. 4, pp. 1057–1068, Apr. 2012.
[29] I. C. H. Lai, Y. Kambayashi, and M. Fujishima, “60-GHz CMOS down-conversion mixer with slow-wave matching transmission lines,” in IEEE Asian Solid-State Circuits Conf. Dig., Nov. 2006, pp. 195–198.
[30] H. C. Kuo, H. R. Chuang, and T. H. Huang, “Design of V-band CMOS down-converting cascode mixer,” Microw. Opt. Technol. Lett., vol. 52, no. 9, pp. 1973–1977, Sep. 2010.
[31] K. H. Liang and H. Y. Chang, “0.5–6 GHz low-voltage low-power mixer using a modified cascode topology in 0.18 μm CMOS technology,” IET Microw., Antenna, Propag., vol. 5, no. 2, pp. 167–174, Jan. 2011.
[32] Z. M. Tsai, J. C. Kao, K. Y. Lin, and H. Wang, “A 24–48 cascode HEMT mixer with dc to 15 GHz IF bandwidth for astronomy radio telescope,” in Proc. Eur. Microw. Integr. Circuits Conf., Sep. 2009, pp. 5–8.
[33] Robert Caverly, CMOS RFIC Design Principles, Artech House, 2007.
[34] Y. A. Lai, C. M. Lin, C. H. Lin, and Y. H. Wang, “A new Ka-band double balanced mixer based on Lange coupler,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 7, pp.458−460, Jul. 2008.
[35] H. K. Chen, D. C. Chang, Y. Z. Juang, and S. S. Lu, “A low-phase-noise 9-GHz CMOS Quadrature-VCO using Novel Source-Follower Coupling Technique,” in IEEE MTT-S Int. Microwave Symp. Dig., Jun. 2007, pp. 851-854.
[36] M. Hossain and A. C. Carusone, “20 GHz low power QVCO and de-skew in 0.13 μm digital CMOS,” in Proc. IEEE Custom Integr. Circuits Conf., Sep. 2008. pp. 447−450.
[37] M. Danesh, F. Gruson, P. Abele, and H. Schumacher, “Differential VCO and frequency tripler using SiGe HBTs for the 24 GHz ISM band,” in IEEE RFIC Symp. Dig., Jun. 2003, pp. 277–280.
[38] S. Ko, J. G. Kim, T. Song, E. Yoon, and S. Hong, “K- and Q-bands CMOS frequency sources with X-band quadrature VCO,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 9, pp. 2789−2800, Sep. 2005.
[39] G. Bu, A. R. Tavakoli, and K. Entesari, “A 24 GHz indirect VCO in 0.18 μm CMOS technology,” in Proc. Microw. Integr. Circuits Conf., Oct. 2008, pp. 71–74.
[40] G. Huang and V. Fusco, “A 94 GHz wide tuning range SiGe bipolar VCO using a self-mixing technique,” IEEE Microw.Wireless Compon. Lett., vol. 21, no. 2, pp. 86–88, Feb. 2011.
[41] P. K. Tsai, C. Y. Liu, and T. H. Huang, “A CMOS voltage controlled oscillator and frequency tripler for 22−27 GHz local oscillator generation”, IEEE Microw. Wireless Compon. Lett., vol. 21, no. 9, pp. 492−493, Sep. 2011.
[42] P. K. Tsai and T. H. Huang, “Integration of current-reused VCO and frequency tripler for 24-GHz low-power phase-locked loop applications”, IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 59, no. 4, pp. 199−203, Apr. 2012.
[43] M. Alioto and G. Palumbo, “Oscillation frequency in CML and ESCL ring oscillators,” IEEE Trans. Circuits Syst. I, vol. 48, no. 2, pp. 210−214, Jan. 2001
[44] X. Gui and M. M. Green, “Design of CML ring oscillator with low supply sensitivity” IEEE Trans. Circuits Syst. I, Reg. Papers, to be published.
[45] B. Razavi, Design of Analog CMOS Integrated Circuits, MeGraw-Hill, 2000.
[46] J. Kim, J. O. Plouchart, N. Zamdmer, R. Trzcinski, K. Wu, B. J. Gross, and M. Kim, “A 44 GHz differential tuned VCO with 4 GHz tuning range in 0.12 μm SOI CMOS,” in IEEE Int. Solid-State Circuits Conf. Dig., 2005, pp. 416−607.
[47] Q. Xia, Z. X. Tang, and B. Zhang, “A Ku-band push-push dielectric resonator oscillator,” J. of Electromagn. Waves and Appl., vol. 24, pp.1859−1866, 2010.
[48] J. Y. Li, W. J. Lin, and M. P. Houng, “A second harmonic suppression CMOS cross-coupled VCO using active inductor technique for WLAN system applications,” J. of Electromagn. Waves and Appl., vol. 24, pp.2077−2086, 2010.
[49] H. F. Zhou, Y. Han, S. R. Dong, and C. H. Wang, “An ultra-low-voltage high-performance VCO in 0.13μm CMOS,” J. of Electromagn. Waves and Appl., vol. 22, pp.2417−2426, 2008.
[50] M. I. Jeong, J. N. Lee, and C. S. Lee, “Design of quasi-chaotic signal generation circuit for UWB chaotic-ook system,” J. of Electromagn. Waves and Appl., vol. 22, pp.1725−1733, 2008.
[51] Y. H. You, J. H. Kim, K. I. Lee, and J. H. Yi, “Fine carrier frequency synchronizer in multiband UWB radio systems,” J. of Electromagn. Waves and Appl., vol. 22, pp.1380−1388, 2008.
[52] M. Fernandez, S. Ver Hoeye, C. Vazquez, G. Hotopan, R. Camblor, and F. Las Heras, “Design and analysis of a multi-carrier Tx-Rx system based on rationally synchronized oscillators for localization applications,” Progress In Electromagnetics Research, vol. 120, pp. 1−16, 2011.
[53] Y. H. Peng and L.H. Lu, “A 16-GHz triple-modulus phase switching prescaler and its application to a 15-GHz frequency synthesizer in 0.18-μm CMOS,” IEEE Trans. Microw. Theory Tech., vol. 55, no.11, pp. 44−51, Jan. 2007.
[54] Y. C. Yang and K. T. Lin, “Programmable CMOS injection-locked frequency divider,” Electron. Lett., vol. 46, no. 21, pp. 1439−1440, Oct. 2010.
[55] J. C. Chien and L.H. Lu, “Analysis and design of wideband injection-locked ring oscillators with multiple-input injection,” IEEE J. Solid-State Circuits, vol. 42, no. 9, pp. 1906−1915, Sep. 2007.
[56] S. L. Jang, J. C. Luo, C. W. Chang, C. F. Lee, and J. F. Huang, “LC-tank Colpitts injection-locked frequency divider with even and odd modulo,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 2, pp. 113−115, Feb. 2009.
[57] F. H. Huang, D. M. Lin, H. P. Wang, W. Y. Chiu, and Y. J. Chan, “20 GHz CMOS injection-locked frequency divider with variable division ratio,” in Proc. Radio Freq. Integr. Circuits Symp., Jun. 2005. pp. 469−472.
[58] A. Mazzanti, L. Larcher, and F. Svelto, “Balanced CMOS LC-tank analog frequency dividers for quadrature LO generation,” in Proc. IEEE Custom Integr. Circuits Conf., Sep. 2005. pp. 575−578.
[59] T. Shibasaki, H. Tamura, K. Kanda, H. Yamahuchi, J. Ogawa, and T. Kuroda, “20-GHz quadrature injection-locked LC dividers with enhanced locking range,” IEEE J. Solid-State Circuits, vol. 43, no. 3, pp. 610−618, Mar. 2008
[60] T. N. Luo, S. Y. Bai, and Y. J. E. Chen, “A 60-GHz 0.13-μm divide-by-three frequency divider,” IEEE Trans. Microw. Theory Tech., vol. 56, no.11, pp. 2409−2415, Nov. 2008.
[61] A. Mirzaei, M. E. Heidari, R. Bagheri, and A. A. Abidi, “Multi-phase injection widens lock range of ring-oscillator-based frequency dividers,” IEEE J. Solid-State Circuits, vol. 43, no. 3, pp. 656−671, Mar. 2008
[62] A. Mirzaei, M. E. Heidari, and A. A. Abidi, “Analysis of oscillators locked by large injection signals: Generalized Alder’s equation and geometrical interpretation,” in Proc. IEEE Custom Integr. Circuits Conf., Sep. 2006. pp. 737−740
[63] A. Mazzanti, P. Uggetti, and F. Svelto, “Analysis and design of injection-locked LC dividers for quadrature generation,” IEEE J. Solid-State Circuits, vol. 39, no. 9, pp. 1425−1433, Sep. 2004.
[64] I. Kwon and K. Lee, “An integrated low power highly linear 2.4-GHz CMOS receiver front-end based on current amplification and mixing,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 1, pp. 36−38, Jan. 2005.
[65] S. Rong and H. C. Luong, “A 1V 1.7mW 25GHz transformer-feedback divide-by-3 frequency divider with quadrature outputs,” in Proc. IEEE Asian Solid-State Circuits Conf., Nov. 2007, pp. 328−331.
[66] W. S. Chang and S. S. H. Hsu, “A 56.5−72.7 GHz transformer-injection Miller frequency divider in 0.13 μm CMOS,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 7, pp. 393−395, Jul. 2010.
[67] C. Y. Lin, P. Z. Rao, Y. K. Lin, and S. J. Chung, “Quadrature current-reused divide-by-3 semi-dynamic frequency divider with active balun,” Electron. Lett., vol. 48, no. 1, pp. 30−31, Jan. 2012.
[68] Z. D. Huang, C. Y. Wu, and B. C. Huang, “Design of 24-GHz 0.8-V 1.51-mW coupling current-mode injection-locked frequency divider with wide locking range,” IEEE Tran. Microw. Theory Tech., vol. 57, no. 8, pp. 1948–1958, Aug. 2009.
[69] S. H. Lee, S. L. Jang, Y. H. Chung, and C. C. Chiu, “A frequency divider implemented with a subharmonic mixer and a divide-by-two divider,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 12, pp.699−701, Dec. 2006.
[70] C. A. Yu, T. N. Luo, and Y. J. E. Chen, “A V-band divide-by-four frequency divider with wide locking range and quadrature outputs,” IEEE Microw. Wireless Compon. Lett., vol. 22, no. 2, pp. 82−84, Feb. 2012.
[71] Y. H. Kuo, J. H. Tsai, H. Y. Chang, and T. W. Huang, “Design and analysis of a 77.3% locking range divide-by-4 frequency divider,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 10, pp. 2477−2485, Oct. 2011.
[72] H. Fu, D. Cai, J. Ren, and W. Li, “A harmonic-suppressed regenerative divide-by-5 frequency divider for UWB applications,” in Proc. IEEE Int. Symp. Circuits and Systems, 2011, pp. 1544−1547.
[73] C. Cao, and K. K. O, “A power efficient 26-GHz 32:1 static frequency divider in 130-nm bulk CMOS,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 11, pp.721−723, Nov. 2005.
[74] C. Kromer, G. Buren, G. Sialm, T. Morf, F. Ellinger, and H. Jackel, “A 40-GHz static frequency divider with quadrature outputs in 80-nm CMOS,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 10, pp.564−566, Oct. 2006.
[75] R. Nonis, E. Palumbo, P. Palestri, and L. Selmi, “A design methodology for MOS current-mode-logic frequency dividers,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 54, no. 2, pp. 245−254, Feb. 2007.
[76] M. W. Li, P. C. Wang, T. H. Huang, and H. R. Chuang, “Low-voltage, wide-locking-range, millimeter-wave divide-by-5 injection-locked frequency dividers,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 3, pp. 679−685, Mar. 2012.
[77] A. Mazzanti, E. Sacchi, P. Andreani, and F. Svelto, “Analysis and design of a double-quadrature CMOS VCO for subharmonic mixing at Ka-band,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 2, pp. 355−363, Feb. 2008.
[78] A. Bonfanti. A. Tedesco, C. Samori, and A. L. Lacaita, “A 15-GHz broad-band ÷2 frequency divider in 0.13-μm CMOS for quadrature generation,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 11, pp. 724-726, Nov. 2005.
[79] Y. S. Lin, Y. H. Wang, and C. L. Lu, “A triple-modulus frequency divider with embedded switches in 90-nm CMOS process,” Progress In Electromagnetics Research C, vol. 34, pp. 99-109, 2013.
[80] S. H. Lee, S. L. Jang, and Y. H. Chung, “A low voltage divide-by-4 injection-locked frequency divider with quadrature outputs,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 5, pp.373−375, Jul. 2007.
[81] C. C. Lin and C. K. Wang, “ A regenerative semi-dynamic frequency divider for mode-1 MB-OFDM UWB hopping carrier generation,” in IEEE Int. Solid-State Circuits Conf. Dig., 2005, pp. 206−207.
[82] S. Cheng, H. Tong, J. Silva-Martinez, and A. Karsilayan, “A fully differential low-power divide-by-8 injection-locked frequency divider up to 18 GHz,” IEEE J. Solid-State Circuits, vol. 42, no. 3, pp. 583−591, Mar. 2007.
[83] R. Dehghani, “Wide band injection-locked quadrature frequency divider based on CMOS ring oscillator,” IET Proc. Microwave, Antennas and Propagagation, vol. 153, no. 5, pp. 420−425, Oct. 2006.
[84] M. Alioto, R. Mita, and G. Palumbo, “Design of high-speed power-efficient MOS current-mode logic frequency dividers,” IEEE Trans. Circuits Syst. II, exp. Briefs, vol. 53, no. 11, pp. 1165−1169, Nov. 2006.
[85] Y. Mo, E. Skafidas, R. Evans, and I. Mareels, “Analysis and design of a 50-GHz 2:1 CMOS CML static frequency divider based on LC-tank,” in Proc. IEEE Eur. Microw. Integr. Circuits Conf., Oct. 2008, pp. 64−67.
[86] C. Zhou, L. Zang, L. Zhang, Z. Yu, and H. Qian, “Injection-locking-based power and speed optimization of CML dividers,” IEEE Trans. Circuits Syst. II, exp. Briefs, vol. 58, no. 9, pp. 565−569, Sep. 2011.
[87] M. Farazian, P. Gudem, and L. Larson, “Stability and operation of injection-locked regenerative frequency dividers,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 57, no. 8, pp. 2006−2019, Aug. 2010.
[88] B. R. Jackson and C. E. Saavedra, “A CMOS subharmonic mixer with input and output active baluns,” Microwave and Optical Technology Letters, vol. 48, no. 12, pp.2472−2478, Dec. 2006.
[89] B. R. Jackson, F. Mazzilli, and C. E. Saavedra, “A frequency tripler using a subharmonic mixer and fundamental cancellation,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 5, pp. 1083−1090, May. 2009.
[90] B. R. Jackson and C. E. Saavedra, “A CMOS Ku-band 4x subharmonic mixer,” IEEE J. Solid-State Circuits, vol. 43, no. 6, pp. 1351−1359, Jun. 2008.
[91] Y. T. Chen, M. W. Li, H. C. Kuo, T. H. Huang, and H. R. Chuang, “Low-voltage, K-band divide-by-3 injection-locked frequency divider with floating-source differential injectior,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 1, pp. 60−67, Jan. 2012.
[92] C. C. Chen, H. W. Tsao, and H. Wang, “Design and analysis of CMOS frequency dividers with wide Input locking ranges,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 12, pp. 3060−3069, Dec. 2009.
[93] E. Monaco, M. Pozzoni, F. Svelto, and A. Mazzanti, “Injection-locked CMOS frequency doublers for u-Wave and mm-Wave applications,” IEEE Journal of Solid-State Circuits, vol. 45, no.8, pp.1565, Aug. 2010.
[94] K. Y. Lin, J. Y. Huang, and S. C. Shin, “A K-band CMOS distributed doubler with current-reuse technique,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 5, pp. 308-310, Mar. 2009.
[95] C. N. Kuo, H. S. Chen, and T. C. Yan, “A K-band CMOS quadrature frequency tripler using sub-harmonic mixer,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 12, pp.822-824, Dec. 2009.
[96] M. C. Chen, and C. Y. Wu, “Design and analysis of CMOS subharmonic injection-locked frequency triplers,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 8, pp. 1869-1878, Aug. 2008.
[97] Y. T. Lo, and J. F. Kiang, “A 0.18μm CMOS self-mixing frequency tripler,” IEEE Microw. Wireless Compon. Lett., vol. 22, no. 2, pp. 79-81, Feb. 2012.
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