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系統識別號 U0026-1906201214381700
論文名稱(中文) 應用田口法於3D堆疊晶片TSV構裝體可靠度之最佳化設計
論文名稱(英文) Optimal Design of 3D Stacking Chip TSV Package Reliability by Using Taguchi Method
校院名稱 成功大學
系所名稱(中) 工程科學系碩博士班
系所名稱(英) Department of Engineering Science
學年度 100
學期 2
出版年 101
研究生(中文) 姜宏昇
研究生(英文) Hung-Sheng Jiang
學號 n96991209
學位類別 碩士
語文別 中文
論文頁數 122頁
口試委員 指導教授-陳榮盛
口試委員-陳鐵城
口試委員-蔡宗岳
口試委員-林恆正
中文關鍵字 TSV  等效塑性應變  田口方法 
英文關鍵字 TSV  equivalent plastic strain  Taguchi methods 
學科別分類
中文摘要 近年來,電子產品對半導體的需求日益增加,使電子封裝朝著多功能整合、小型化、高效能、低成本、低功耗等目標的追求。因此,電子封裝產業逐漸轉往三維封裝進行研究發展,讓有限的封裝體體積可提高堆積密度達到高效率與微小化,以致於結合多功能性元件為一體之整合得以實現。本文將針對3D堆疊晶片TSV構裝體,使用ANSYS 12版有限元素分析軟體進行模擬分析。首先,導入全域/局部模型之求解方法,使其獲得有效率分析。其次,由單一因子分析可知,欲降低關鍵銅柱之等效塑性應變,可藉由增加基板熱膨脹係數、ABF楊氏係數、ABF熱膨脹係數、銅凸塊厚度、銅凸塊半徑、ABF厚度以及減少基板楊氏係數、晶片楊氏係數、晶片熱膨脹係數、銅熱膨脹係數、基板厚度、晶片厚度。最後,篩選出影響TSV構裝體最為顯著之七組控制因子,配合田口品質工程分析進行最佳化設計,並獲得銅柱最大等效塑性應變為0.0598,而最佳化提升32.52%,故對於TSV構裝之可靠度有明顯的改善。
英文摘要 In recent years, with the increasing demand of semiconductors for the electronic products, the electronic packaging has been focused on the technology of multi-functional integration, miniaturization, high performance, low-cost and low power consumption. Therefore, the electronic packaging industry is trending to the 3D packaging research and development. Accordingly, the package stacking density of the limited volume of can be increased to ensure higher efficiency and miniaturization so that the integration of the versatility components can be realized.
By adopting the 3D stacked chip TSV package, this paper applies the finite element analysis of ANSYS 12 software to carry out the simulation. The Global/Local model approach is firstly induced to promote its simulation efficiency. Secondly, the one factor at a time analysis shows that the reduction of the key copper pillars of the equivalent plastic strain depends on the increases of CTE of the substrate, CTE and Young’s modulus of the ABF, thickness and radius of the copper bump, thickness of the ABF as well as the reductions of Young’s modulus of the substrate, CTE and Young’s modulus of the chip, CTE of the copper, thickness of the substrate and thickness of the chip. Finally, the seven groups control factors with the most significant impact on the TSV package are filtered out. In accordance with the Taguchi methods, an optimal design is conducted. As a result, the copper pillars maximum equivalent plastic strain of 0.0598 and the optimization promotes of 32.52% are obtained so that the TSV package reliability is effectively improved.
論文目次 中文摘要I
AbstractII
誌謝III
目錄IV
表目錄VIII
圖目錄XI
符號表XV
第一章 緒論
1-1 前言1
1-2 研究動機與目的2
1-3 文獻回顧3
1-4 研究方法5
1-5 章節提要5
第二章 理論基礎
2-1 TSV構裝體研究主題8
2-2 TSV相關製程技術9
2-2-1 導孔的形成9
2-2-2 導孔的填充11
2-2-3 晶圓接合12
2-2-4 晶圓薄化13
2-2-5 TSV構裝體之製程13
2-3 彈塑性理論14
2-3-1 Tresca準則15
2-3-2 Von-Mises準則16
2-3-3 硬化法則16
2-4 全域/局部模型分析法17
2-5 田口品質工程設計19
2-5-1 直交表19
2-5-2 信號雜訊比20
2-5-3 反應表和反應圖21
2-5-4 變異數分析21
2-6 信心區間23
2-6-1 預測值的信心區間24
2-6-2 確認實驗值的信心區間24
2-6-3 預測值與確認實驗值的比較25
第三章模型分析之建立與評估
3-1 堆疊晶片TSV構裝體分析模型32
3-1-1 模型簡述32
3-1-2 假設條件33
3-2 堆疊晶片TSV構裝體全域模型之建立與收斂分析34
3-2-1 全域模型之建立34
3-2-2 邊界條件與負載設定34
3-2-3 全域模型之網格收斂分析35
3-2-4 全域模型分析結果之評估36
3-2-5 全域精細模型分析結果之評估37
3-3 堆疊晶片TSV構裝體局部模型之建立與收斂分析38
3-3-1 局部模型之建立與範圍38
3-3-2 局部模型之範圍收斂分析39
3-3-3 局部模型之網格收斂分析39
3-3-4 局部模型分析之評估39
3-4 全域精細模型與全域/局部模型之誤差比較40
3-5 溫度循環下模型之穩定分析40
第四章單一因子法實驗設計分析
4-1 單一因子水準設計69
4-1-1 材料性質因子水準70
4-1-2 幾何尺寸因子水準71
4-2 單一因子分析結果71
4-2-1 材料性質因子分析結果72
4-2-2 幾何尺寸因子分析結果77
4-3 單一因子分析結果探討81
第五章田口品質最佳化實驗設計
5-1 品質特性選定97
5-2 決定控制因子與水準值98
5-3 選定適當的直角表99
5-4 模擬實驗結果99
5-5 變異分析100
5-6 預測與確認實驗102
第六章結論與未來研究方向
6-1 結論115
6-2 未來研究方向119
參考文獻120
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