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系統識別號 U0026-1601202019451200
論文名稱(中文) 具適應性電壓準位之非反向升-降壓型直流-直流轉換器
論文名稱(英文) A Non-Inverting Buck-Boost DC-DC Converter with Adaptive Voltage Positioning Mechanism
校院名稱 成功大學
系所名稱(中) 電機工程學系
系所名稱(英) Department of Electrical Engineering
學年度 108
學期 1
出版年 109
研究生(中文) 劉㦤婷
研究生(英文) Yi-Ting Liou
學號 N26060232
學位類別 碩士
語文別 中文
論文頁數 114頁
口試委員 指導教授-魏嘉玲
口試委員-張順志
口試委員-蔡建泓
口試委員-鄭光偉
口試委員-黃崇勛
中文關鍵字 升壓-降壓型轉換器  主動式電壓降控制  適應性電壓準位  差動差分放大器 
英文關鍵字 Buck-Boost Converter  Active-Droop Control  Adaptive Voltage Positioning (AVP)  Differential Difference Amplifier (DDA) 
學科別分類
中文摘要 近年來可攜式電子產品蓬勃發展,在電池容量沒有顯著成長的情況下,如何延長電子產品的使用時間成為一個重要的議題,此外,隨著製程的演進,單一晶片中整合越來越多的電晶體,逐漸降低的操作電壓面臨著越來越大的操作電流,如何使暫態反應時的電壓變動仍維持於可接受範圍也成為另一個挑戰。
針對這兩個問題,本系統提出一具適應性電壓準位之非反向升壓-降壓型直流-直流轉換器,透過主動式電壓降控制來實現適應性電壓準位,完整利用電池所提供的電壓範圍來供給後端電路使用,藉由小訊號模型分析來確保系統穩定度並達到定常數輸出阻抗,有別於傳統主動式電壓降控制需要額外的減法器電路,本研究以差動差分放大器同時實現減法器與補償器電路,並將補償網路內建於晶片內,降低電路成本並提高效率。
本晶片使用台灣積體電路公司0.35μm 2P4M 5V混合訊號製程,晶片大小約為4mm^2,當輸入為2.5V至5V且負載電流為50mA至350mA時,輸出電壓均可穩定於3.3V,最高效能可達95.57%。
英文摘要 Nowadays, portable devices have been developed rapidly. Given the battery capacity does not have an obviously improvement, how to extend the operational time of these devices becomes an important issue. With the advancement of processing technologies, more transistors are integrated to achieve fast calculation speed and multiple functions. The static current increases significantly while the operational voltage gets lower. Therefore, maintaining the output voltage in the acceptable range during load transient is another stringent challenge.

In this thesis, a non-inverting buck-boost DC-DC converter with adaptive voltage positioning (AVP) is proposed based on active-droop control method. The analysis of small-signal model is discussed to ensure the stability and constant output impedance is achieved to improve the transient response. Moreover, the differential difference amplifier (DDA) is used to realize a subtractor and a compensator simultaneously. The compensate network is on chip which also makes the converter lower cost and more efficiency.

The chip is fabricated by using TSMC 0.35 μm 2P4M 5 V mixed-signal process, and the chip size is about 4 mm2. The input voltage ranges from 2.5 to 5 V, the output voltage is regulated at 3.3 V, and the load current ranges from 50 to 350 mA. The measured maximal efficiency is 95.57 %.
論文目次 第一章 簡介 1
1.1 研究動機 1
1.2 論文架構 2
第二章 適應性電壓準位基本介紹與控制方法 3
2.1 適應性電壓準位基本介紹 3
2.1.1 適應性電壓準位模式與傳統模式 3
2.1.2 定常數輸出阻抗(Constant Output Impedance) 4
2.2 文獻探討與控制方法介紹 8
2.2.1 脈波寬度控制AVP 8
A. 峰值電流控制(Peak Current Control, PCC) 8
B. 主動式電壓降控制(Active-Droop Control) 13
2.2.2 輸出電容種類的影響 16
A. 輸出電容的種類介紹 16
B. 陶瓷電容的設計問題 17
2.2.3 漣波控制AVP 19
A. 遲滯控制(Hysteretic Control) 19
B. 固定導通時間控制(Constant On-Time, COT) 24
2.3 比較 27
第三章 系統架構與電路設計 29
3.1 系統架構簡介 29
3.1.1 非反向升壓-降壓型轉換器 30
3.1.2 小訊號分析(Small-Signal Analysis) 31
A. 轉換器分析 31
B. 閉迴路分析 41
3.1.3 AVP設計 47
A. 穩定度分析(T1) 47
B. 電阻性輸出阻抗設計(T2) 48
C. 升壓模式設計 52
3.2 電路設計與功能介紹 54
3.2.1 PI補償器(PI Compensator) 55
A. 誤差放大器(Error Amplifier) 55
B. 電容放大器(Capacitor Multiplier) 57
3.2.2 電流感測電路(Current Sensing Circuit) 60
3.2.3 鋸齒波產生器(Ramp Generator) 62
3.2.4 脈波寬度調變控制電路(PWM Controller) 65
3.2.5 零電流偵測與不連續導通模式控制器(ZCD&DCM Controller) 66
3.2.6 死區間控制與閘級控制器(Dead-Time&Gate Controller) 68
3.2.7 啟動電路(Start-Up Circuit) 70
第四章 模擬結果與佈局考量 71
4.1 模擬結果 71
4.1.1 鋸齒波產生器(Ramp Generator) 71
4.1.2 啟動階段(Initial State) 72
4.1.3 穩態(Steady State) 75
4.1.4 負載暫態響應(Load Transient) 78
4.1.5 效率(Efficiency) 85
4.2 佈局考量 86
A. 功率電晶體(Power Transistor) 86
B. 閘級驅動器(Gate Driver) 86
C. 數位控制電路(Digital Control Circuits) 86
D. 脈波寬度調變控制電路(PWM Controller) 87
E. 鋸齒波產生器(Ramp Generator) 87
F. 電流感測電路(Current Sensing Circuit) 87
G. 補償器(Compensator) 87
H. 帶差參考電壓電路(Bandgap) 87
I. 輸出緩衝器(Output Buffer) 87
4.3 打線圖 89
第五章 量測結果 92
5.1 量測環境與考量 92
5.2 量測結果 95
5.2.1 鋸齒波產生器(Ramp Generator) 95
5.2.2 啟動階段(Initial State) 96
5.2.3 穩態(Steady State) 98
5.2.4 負載暫態反應(Load Transient) 100
5.2.5 負載線(Load Line) 105
5.2.6 電源電壓調節率 (Line Regulation) 106
5.2.7 效率(Efficiency) 107
5.3 規格比較表 108
第六章 結論與未來展望 111
參考文獻 112
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