進階搜尋


下載電子全文  
系統識別號 U0026-1308201020364000
論文名稱(中文) 支援GDB之指令集架構模擬器與其全系統虛擬平台
論文名稱(英文) An Instruction Set Simulator with GDB Support and its Full System Simulation Virtual Platform
校院名稱 成功大學
系所名稱(中) 電腦與通信工程研究所
系所名稱(英) Institute of Computer & Communication
學年度 98
學期 2
出版年 99
研究生(中文) 李信穎
研究生(英文) Shin-Ying Lee
學號 q3697402
學位類別 碩士
語文別 英文
論文頁數 60頁
口試委員 指導教授-陳中和
口試委員-謝錫堃
口試委員-邱瀝毅
口試委員-黃穎聰
中文關鍵字 虛擬平台  全系統模擬  協同模擬  系統除錯 
英文關鍵字 virtual platform  full system simulation  co-simulation  system debugging 
學科別分類
中文摘要 在晶片系統的開發過程中,如何在全部的硬體裝置開發完成前即進行系統軟體的開發以及軟硬體的協同模擬與協同驗證,是晶片系統開發人員一直以來所面臨的一大挑戰。
在本論文中,我們利用SystemC模組實現了一個基於ARM架構的指令集模擬器與其全系統虛擬平台。此SystemC虛擬平台提供了功能準確性以及時間準確性的全系統模擬環境。藉由此SystemC虛擬平台,系統開發工程師能夠很容易地對整體晶片系統(包含:硬體裝置、作業系統、驅動程式、以及應用程式…等部件)進行協同模擬、協同驗證、系統評測與演算法分析的工作。除此之外,此虛擬平台亦內建了GDB遠端除錯協定的通訊通道。透過此遠端除錯通道,SystemC虛擬平台可直接與GDB除錯器進行連接,便於軟體工程師利用此虛擬平台和我們所修改擴充的naked GDB除錯器於系統開發先期即開始進行各種系統軟體與應用程式的開發及除錯工作,以達到有效地縮短整體晶片系統開發時程的目標。
英文摘要 When developing a system-on-a-chip (SoC) embedded system, how to develop the system software as well as co-verify the hardware and software before all hardware modules are available is usually a big challenge for engineers.
In this thesis, we have implemented a virtual platform with an ARM-based instruction set simulator in SystemC. This virtual platform provides a functional and/or approximate-timed accurate full system simulation environment. By this SystemC virtual platform, SoC developers are able to co-simulate, co-verify, evaluate, and analyze the whole SoC system including hardware devices, OS kernel, device drivers, and application programs…etc., in a simple way. Also, we have provided a GDB RDP communication channel to connect the virtual platform and GDB debugger directly. Through this virtual platform and the naked GDB debugger which we modify from GDB, software engineers can easily develop and debug the system programs in the early development stage. Thus, the time-to-market of a new SoC design can be reduced significantly.
論文目次 摘要 I
Abstract II
Contents III
List of Figures VI
List of Tables VIII
Chapter 1 - Introduction 1
1.1 Motivation 1
1.2 Contribution 2
1.3 Scope and Organization 3
Chapter 2 - Background and Related Works 4
2.1 Instruction Set Simulator 4
2.1.1 Interpretive Simulation 4
2.1.2 Static Compiled Simulation 5
2.1.3 Dynamic Compiled Simulation 6
2.2 GNU Debugger 7
2.2.1 Introduction to GDB 7
2.2.2 Remote Debugging Protocol 8
2.3 Related Works 10
2.3.1 Simplescalar 10
2.3.2 FaCSim 10
2.3.3 Dynamic Binary Translation 11
2.3.4 SimIt-ARM 12
2.3.5 Hybrid Compiled Simulation 12
2.3.6 Simics 13
Chapter 3 - System Framework 14
3.1 Emulation Methodology 14
3.1.1 The Accurate Model 14
3.1.2 SystemC Simulation Methodologies 16
3.2 ARM-Based Instruction Set Simulator 18
3.2.1 Datapath 18
3.2.2 Memory System 20
3.2.3 Exception Handlers 20
3.3 Naked GDB 21
3.3.1 The Virtual Platform with GDB 21
3.3.2 Co-processor Probing 22
3.4 Power Estimation of the Memory System 23
3.5 The SystemC Virtual Platform 25
3.5.1 Platform Overview 25
3.5.2 Full System Simulation 27
3.5.3 Evaluation Methodology 31
Chapter 4 - Platform Verification 33
4.1 Verification Methodology 33
4.2 Linux Booting Sequence 34
4.3 Verification Result 35
4.3.1 Verification by Linux Booting 35
4.3.2 Verification by Device Driver under Linux 38
4.3.3 Verification by User Mode Applications under Linux 39
4.3.4 Co-Work with the Naked GDB 41
4.3.5 Summary of System Verification 42
Chapter 5 - Evaluation and Results 43
5.1 Experimental Environment and Parameters 43
5.2 Simulation Performance 45
5.2.1 The Throughput 45
5.2.2 SystemC Speedup 47
5.3 Cycles per Instruction 48
5.4 Power Metric 49
5.5 Profiling of Linux Booting Sequence 51
Chapter 6 - Conclusions 55
Chapter 7 - Future Works 56
References 57
參考文獻 [1] “PrimeCell Color LCD (PL110) Technical Reference Manual DDI-0161E,” ARM Co. Ltd., May 2003.
[2] “ARM Dual-Timer Module (SP804) Technical Reference Manual,” ARM Co. Ltd., January 2004.
[3] “ARM926EJ-S Technical Reference Manual DDI-0198D,” ARM Co. Ltd. January 2004.
[4] “PrimeCell Vectored Interrupt Controller (PL190) Technical Reference Manual DDI-0181E” ARM Co. Ltd., November 2004.
[5] “ARM Architecture Reference Manual DDI-0100I,” ARM Co. Ltd., July 2005.
[6] “PrimeCell UART (PL011) Technical Reference Manual DDI-0183F,” ARM Co. Ltd., November 2005.
[7] “Versatile Application Baseboard for ARM926EJ-S User Guide DUI-0225B,” ARM Co. Ltd., July 2006.
[8] “IEEE Standard SystemC Language Reference Manual,” Design Automation Standards Committee, IEEE Computer Society, March 2006.
[9] J. R. Andrews, “Co-Verification of Hardware and Software for ARM SoC Design,” Elsevier Inc., August 2004.
[10] D. Beal, “The Magic of Virtualized Systems Development,” Virtutech Co. Ltd., October 2009.
[11] D. C. Black, J. Donovan, B. Bunton, and A. Keist, “SystemC: From the Ground up 2nd Edition,” Springer Media Inc., 2010.
[12] D. P. Bovet and M. Cesati, “Understanding the Linux Kernel 3rd Edition,” O’Reilly Media Inc., November 2005.
[13] D. Burger and T. M. Austin, “The Simplescalar Tool Set Version 2.0,” University of Wisconsin-Madison Computer Sciences Department Technical Report, June 1997.
[14] F. Bellard, “QEMU, a Fast and Portable Dynamic Translator,” Proceedings of the 2005 USENIX Annual Technical Conference, Anaheim, CA, USA, April 2005.
[15] L. Charest, C. Pilking, and P. Paulin, “SystemC Performance Evaluation Using a Pipelined DLX Multiprocessor,” Proceedings of the 2002 ACM/IEEE Design, Automation, & Test in Europe Conference (DATE’02), Paris, France, March 2002.
[16] J. Corbet, A. Rubini, and G. Kroah-Hartman, “Linux Device Driver 3rd Edition”, O’Reilly Media Inc., January 2005.
[17] J. Gilmore and S. Shebs, “GDB Internals—A Guide to the Internals of the GNU Debugger,” Cygnus Solutions, February 2004.
[18] T. Grötker, S. Liao, G. Martin, and S. Swan, “System Design with SystemC,” Springer Media Inc., 2002.
[19] M. R. Guthaus, et al., “MiBench: a Free, Commercially Representative Embedded Benchmark Suite,” Proceedings of the 2008 IEEE International Workshop on Workload Characterization (WWC’01), Austin, TX, USA, December 2001
[20] A. H. Han, Y.-S. Hwang, Y.-H. An, S.-J. Lee, and K.-S. Chung, “Virtual ARM Platform for Embedded System Developers,” Proceedings of the 2008 IEEE International Conference on Audio, Languages, and Image Processing (ICALIP’08), pp. 586-592, Shanghai, China, November 2008.
[21] H.-W. Kao, “Embedded Processor Verification Using Particular Characteristics of Linux Operating System,” 2006 master thesis of National Cheng Kung University, Tainan, Taiwan, July 2006.
[22] J. Lee, et al., “FaCSim: A Fast and Cycle-Accurate Architecture Simulator for Embedded Systems,” Proceedings of the 2008 ACM SIGPLAN-SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES’08), pp. 89-100, Tucson, AZ, USA, June 2008.
[23] P. S. Magnusson, et al., “Simics: A Full System Simulation Platform,” IEEE Computer, Vol. 35, No. 2, pp. 50-58, February 2002.
[24] P. Ezudheen, et al., “Parallelizing SystemC Kernel for Fast Hardware Simulation on SMP Machines,” Proceedings of the 23rd ACM/IEEE/SCS Workshop on Principles of Advanced and Distributed Simulation (PADS’09), pp. 80-87, Lake Placid, NY, USA, June 2009.
[25] J. Montanaro, et al., “A 160-MHz, 32-b, 0.5-W CMOS RISC Microprocessor,” IEEE Journal of Solid-State Circuits, Vol. 31, No. 11, pp. 1703-1714, November 1996.
[26] M. Montón, A. Portero, M. Moreno, B. Martínez, and J. Carrabina, “Mixed SW/SystemC SoC Emulation Framework,” Proceedings of the 2007 IEEE Symposium on Industrial Electronics (ISIE’07), pp. 2338-2341, Vigo, Spain, June 2007.
[27] N. Muralimanohar, R. Balasubramonian, and N. P. Jouppi, “CACTI 6.0: A Tool to Model Large Caches,” HP Laboratories, April 2009.
[28] M. Reshadi, P. Mishara, and N. Dutt, “Instruction Set Compiled Simulation: A Technique for Fast and Flexible Instruction Set Simulation,” Proceedings of the 40th ACM/IEEE Design Automation Conference (DAC’03), Vol. 8, No. 3, pp. 758-763, Anaheim, CA, USA, June 2003.
[29] M. Reshadi and N. Dutt, “Reducing Compilation Time Overhead in Compiled Simulators,” Proceedings of the 21st IEEE Internaional Conference on Computer Design (ICCD’03), pp. 151-153, San Jose, CA, USA, October 2003.
[30] M. Reshadi, P. Mishara, and N. Dutt, “Hybrid-Compiled Simulation: An Efficient Technique for Instruction-Set Architecture Simulation,” ACM Transactions on Embedded Computer Systems, Vol. 8, No. 3, pp. 20-27, April 2009.
[31] R. L. Sites, A. Chernoff, M. B. Kirk, M. P. Marks, and S. G. Robinson, “Binary Translation,” Communications of the ACM, Vol. 36, No. 2, pp. 68-81, February 1993.
[32] A. N. Sloss, D. Symes, and C. Wright, “ARM System Developer’s Guide: Design and Optimizing System Software”, Elsevier Inc., March 2004.
[33] R. Stallman, R. Pesch, S. Shebs, et al., “Debugging with GDB—The GNU Source-Level Debugger 9th Edition”, Cygnus Solutions, February 2004.
[34] R. Stones and N. Matthew, “Beginning Linux Programming 3rd Edition,” Wiley Publishing Inc., January 2004.
論文全文使用權限
  • 同意授權校內瀏覽/列印電子全文服務,於2011-08-30起公開。
  • 同意授權校外瀏覽/列印電子全文服務,於2012-08-30起公開。


  • 如您有疑問,請聯絡圖書館
    聯絡電話:(06)2757575#65773
    聯絡E-mail:etds@email.ncku.edu.tw