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系統識別號 U0026-0308202019090300
論文名稱(中文) 應用於94-GHz CMOS射頻前端與整合GIPD天線之“混頻器優先”次諧波射頻接收機的毫米波混頻器之研製
論文名稱(英文) Research on Millimeter-Wave Mixers for 94-GHz CMOS RF Front-End and “Mixer-First” Sub-Harmonic RF Receiver with Integrated GIPD Antenna
校院名稱 成功大學
系所名稱(中) 電腦與通信工程研究所
系所名稱(英) Institute of Computer & Communication
學年度 108
學期 2
出版年 109
研究生(中文) 劉家妤
研究生(英文) Chia-Yu Liu
學號 Q36064573
學位類別 碩士
語文別 中文
論文頁數 100頁
口試委員 指導教授-莊惠如
口試委員-黃尊禧
口試委員-楊慶隆
口試委員-甘堯江
中文關鍵字 94-GHz  W-band  CMOS  GIPD  低功耗  毫米波  非對稱式可升降頻  混頻器  次諧波射頻接收機晶片 
英文關鍵字 94-GHz  CMOS  GIPD  Low power comsuption  weak inversion  W-band  sub-hormonic mixer  bidirectional  “Mixer fisrt” RF receiver 
學科別分類
中文摘要 本論文第一部份為設計94-GHz低功率消耗及低LO驅動功率之環型降頻混頻器及94-GHz非對稱式可升降頻雙平衡混頻器,兩者皆採用TSMC CMOS 90-nm製程,晶片電路設計以Agilent ADS及全波電磁模擬軟體進行模擬,量測皆採用on-wafer方式進行。94-GHz環型降頻混頻器採用弱反轉區偏壓技術,以達到低功率消耗及低LO驅動功率功能;亦使用基底偏壓控制技術,降低電晶體臨界電壓值,藉以提升轉換增益;輸出級採用轉阻放大器以適度提升轉換增益且改善輸出阻抗匹配。94-GHz非對稱式可升降頻混頻器選擇雙平衡架構,在升頻時設計為主動式混頻器,能提供轉換增益及良好OP1dB;在降頻時設計為被動式混頻器,由中頻放大器提供轉換增益並同時維持其線性度表現;此外,在混頻器電路RF、LO輸入端分別設計變壓器與馬遜平衡器用以饋入差動信號。

論文第二部份主要為研製應用於94-GHz 整合GIPD 對數週期天線及47-GHz壓控振盪器之CMOS“混頻器優先”次諧波射頻接收機的低功耗混頻器。混頻器優先(mixer-first)概念將天線與混頻器直接整合,與傳統射頻接收機架構相比,省去接收低雜訊放大器(LNA)級,可降低系統功率消耗與設計複雜度。次諧波混頻原理可減輕與壓控振盪器整合的頻率設計負擔;對數週期天線採用AFSC GIPD製程,透過覆晶技術(flip-chip)由金凸塊(gold bump)與CMOS混頻器異質整合成94-GHz “混頻器優先”之毫米波次諧波射頻接收機晶片。
英文摘要 This thesis presents the design of two 94-GHz CMOS millimeter-wave (MMW) mixers and the integration design of a CMOS sub-hormonic low power mixer, with a GIPD modified log periodic dipole array (LPDA) antenna and a 47-GHz subhormic VCO, for an integrated “mixer fisrt” RF receiver frontend. The CMOS process is the standard TSMC 90-nm GUTM technology and the GIPD process is from the AFSC. In the first part, to design of a 94-GHz double balance down convert ring mixer, the weak inversion biasing technique is used to achieve low power consumption and lower LO driven power. Then for a 94-GHz asymmetric double balance up/down conversion mixer is designed to be used for the integration in a 94-GHz CMOS single-mixer RF transceiver. For the bidirectional up/down conversion operation, in the TX up-conversion mode, an active mixer is desirable to provide a higher conversion gain and OP1dB to drive the power amplifier (PA). While in the RX down-conversion mode, a passive mixer is preferred for higher receiver linearity and conversion gain (with IF buffer amplifiers). In the second part, a 94 GHz CMOS low-power sub-hormonic mixer (SHM) is designed to integrate with a GIPD modified LPDA antenna and a 47 GHz subhormic VCO to form a 94-GHz “mixer fisrt” receiver RF front end. The “mixer fisrt” RF receiver without a LNA can lower down the power consumption and the design complexity. The SHM can reduce the loading of a much-higher-frequency VCO design. The GIPD antenna array uses the gold bumper of flip chip technology to integrate with the CMOS mixer (connected by a 47-GHz VCO). The chip measurement is performed in a MMW on-wafer probe system.
論文目次 第一章 緒論 1
1.1 研究動機與背景 1
1.2 論文架構 3
第二章 94-GHz CMOS低LO功率、低功耗之環型降頻混頻器 5
2.1 研究動機與背景 5
2.2 混頻器電路設計與量測 6
2.2.1 架構選定 7
2.2.2 弱反轉偏壓技術 10
2.2.3 基底偏壓控制技術 11
2.2.4 轉阻放大器 11
2.2.5 馬遜平衡器(Marchand balun) 13
2.2.6 電路設計說明與考量 15
2.2.7 模擬與量測結果 21
2.3 結果與討論 26
附錄 二A 弱反轉區偏壓技術 27
附錄 二B 馬遜平衡器(Marchand Balun) 33
第三章 94-GHz CMOS非對稱式可升降頻雙平衡混頻器 37
3.1 研究動機與背景 37
3.2 混頻器電路設計與量測 39
3.2.1 架構選定 40
3.2.2 升頻模式 40
3.2.3 降頻模式 41
3.2.4 變壓器分析 43
3.2.5 電路設計說明與考量 43
3.2.6 模擬與量測結果 46
3.3 結果與討論 52
附錄 三A 變壓器模型分析 54
第四章 應用於94-GHz 整合GIPD 對數週期天線及47-GHz 壓控振盪器之CMOS“混頻器優先"次諧波射頻接收機的低LO驅動功率混頻器 59
4.1 研究動機與背景 59
4.2 94-GHz混頻器優先(Mixer-First) 射頻接收機晶片 61
4.3.1 GIPD改良式對數週期陣列天線 61
4.3.2 CMOS單端次諧波低LO驅動功率混頻器 63
4.3.3 變壓器回授壓控振盪器 66
4.3.4 製程介紹 67
4.3 94-GHz整合天線之”混頻器優先”接收機電路模擬結果 68
4.3.1 GIPD改良式對數週期陣列天線 68
4.3.2 平衡式射頻濾波器 70
4.3.3 改良式對數週期陣列天線整合平衡式射頻濾波器 71
4.3.4 94-GHz CMOS單端次諧波低LO驅動功率混頻器 73
4.3.5 47-GHz 變壓器回授壓控振盪器 74
4.4 94-GHz混頻器優先(mixer-first)射頻接收機量測結果 75
4.5 結果與討論 78
附錄 四A 整合式被動元件(GIPD)製程簡介 82
附錄 四B 對數週期偶極子陣列天線 84
附錄 四C 電阻式混頻器(Resistive Mixer) 86
附錄 四D 號角(Horn)天線之遠場距離 90
第五章 結論 93
參考文獻 95
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